Question: 2 . For a direct mapped cache with a 3 2 - bit address, the following bits of address are used to access the cache.

2 .

For a direct mapped cache with a

32 -

bit address, the following bits of address are used to access the cache. Tag Index Offset

31 - 10 9 - 5 4 - 0

Assume this computer is byte

-

addressable. What is the word size? What is the cache block size? How many entries does the cache have? What is the overhead of this cache in terms of data storage?

(

Saving tag, and also valid bits are overhead of a cache memory in terms of data storage

)

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