3. (10pts) Consider the LEGV8 datapath below that can perform R-type, I-type, D-type and CBZ instructions....

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3. (10pts) Consider the LEGV8 datapath below that can perform R-type, I-type, D-type and CBZ instructions. For executing CBNZ instruction as well, (a) Are there any additional logic blocks needed to add to the datapath? If yes, add the necessary logic blocks and control signal to it and explain their purpose. (b) Show the dataflow for the CBNZ instruction using dash lines on the figure below. Add 0 MX >Add, 4- ALU result 1 Reg2Loo Branch MemRead Shift left 2 Instruction [31-21] Control ALUOD MemWrite ALUSrc RegWrite Instruction [9-5] Read Read PC address Instruction [20-16]/0 register 1 Read M data 1 Read Zero Instruction [31-0] register 2 Instruction memory Instruction [4-0] follow Write register Read data 2 ALU ALU Read Address result data M M X Write 0 data Registers Write data memory Data Instruction [31-0] 32 64 Sign- extend ALU control Instruction [31-21] (c) How would you set the following control signals to support the CBNZ instruction? Reg2Loc Branch MemRead MemtoReg ALUOp MemWrite ALUSrc RegWrite 3. (10pts) Consider the LEGV8 datapath below that can perform R-type, I-type, D-type and CBZ instructions. For executing CBNZ instruction as well, (a) Are there any additional logic blocks needed to add to the datapath? If yes, add the necessary logic blocks and control signal to it and explain their purpose. (b) Show the dataflow for the CBNZ instruction using dash lines on the figure below. Add 0 MX >Add, 4- ALU result 1 Reg2Loo Branch MemRead Shift left 2 Instruction [31-21] Control ALUOD MemWrite ALUSrc RegWrite Instruction [9-5] Read Read PC address Instruction [20-16]/0 register 1 Read M data 1 Read Zero Instruction [31-0] register 2 Instruction memory Instruction [4-0] follow Write register Read data 2 ALU ALU Read Address result data M M X Write 0 data Registers Write data memory Data Instruction [31-0] 32 64 Sign- extend ALU control Instruction [31-21] (c) How would you set the following control signals to support the CBNZ instruction? Reg2Loc Branch MemRead MemtoReg ALUOp MemWrite ALUSrc RegWrite