3. (7 points) The instruction subi $2, $5, 8 is being executed on the single cycle processor design discussed in class and shown in the following figure: Jump address [31-01 Instruction (25-0) Shift left 2 26 28 PC +4 [31-28] > Add 4 Add ALU result Shift left 2 RegDst Jump Branch MemRead MemtoReg Instruction (31-26] ( Control ALUOD MemWrite ALUS RegWrite PC Road register 1 Read data 1 Read Il instruction (25-21) Read address Instruction (20-16) Instruction JUN 0 (31-0) Instruction Instruction (15-111 memory Zero ALU ALU register 2 Read SH0 register data 2 Write result Address Read data Write data Registers Write Data data memory Instruction [15-01 16 Sign- 32 extend ALU control Instruction 15-01 What are the values of the control signals generated by the "Control block? Please answer by filling the second column of the table below: Value Control Signal RegWrite Mem Read Mem Write MemtoReg ALUSC Branch Jump ALUop