3) Building Shift Register using 74SL74 - DFFs: . Build "a 4-bit Shift Register out of D flip-flops. It should have the basic Clear pulse switch to clear the data and the Clock pulse switch input to give a clock pulse to the D flip-flop indicating the change of state. In this case we would have only 1 input switch that would go to the first D flip- flop whose output would sequentially go to the second and so on. This would have 4 outputs of the 4 D flip-flops as the outputs going to the 4 LEDs. Extend this implementation to perform the following 4 tasks-in-1 in parallel. 2 inputs should determine which part will be performed. (Same as Adder/Subtractor in which there were 2 tasks versus 4 tasks here) 1. No change 2. Shift Left 3. Shift Right 4. Parallel Load No change means the Shift Register should remain the same even after providing clock pulses. Shift Left corresponds to the bits shifting to the left by 1 bit with each clock pulse. Shift Right corresponds to the bits shifting to the right by 1 bit with each clock pulse. Parallel load means that the whenever this function is performed all the 4 outputs of the D flip-flops are the inputs provided. Thus, this implementation would have 4 inputs and 4 outputs. Draw the circuit/logic diagram and write a brief description of what the circuit does and how it works