4. Assume that we have a MIPS processor with a 5-stage pipeline. Consider the MIPS assembly code below. Explain which instructions that cause a hazard and what kind of hazards these are. State how the hazards can be solved for the different cases. You should suggest the best possible solution, that is, that results in that the code takes as few clock cycles as possible to execute lui addi $t0, $0,10 SW lw and Sto, sto,stl $s0, 0x1001 t0, 12 ($s0) t1,8 ($s0) 4 4. Assume that we have a MIPS processor with a 5-stage pipeline. Consider the MIPS assembly code below. Explain which instructions that cause a hazard and what kind of hazards these are. State how the hazards can be solved for the different cases. You should suggest the best possible solution, that is, that results in that the code takes as few clock cycles as possible to execute lui addi $t0, $0,10 SW lw and Sto, sto,stl $s0, 0x1001 t0, 12 ($s0) t1,8 ($s0) 4