Assume that we have a MIPS processor with a $5-$stage pipeline. Consider the MIPS assembly code below. Explain which instructions that cause a hazard and what kind of hazards these are. State how the hazards can be solved for the different cases. You should suggest the best possible solution, that is$,$ that results in that the code takes as few clock cycles as possible to execute.

$1$ addi $s$3,$ $$0,0$xff$3$

$2$ ori $t$4,$ $$0,0$x$7$f

$3$ sw $t$4,4($$s$3)$

$4$ lw $t$2,8($$s$3)$

$5$ xor $t$4,$ $t$4,$ $t$2$