4.5 The following table represents a small memory. Refer to this table for the following questions. Address 0000 0001 0010 0011 0100 0101 Data 0001 1110 0100 0001 1111 0000 0010 0001 0110 1111 0000 0001 0000 0000 0000 0000 0000 0000 0100 0001 0000 0000 0000 0110 0111 0000 1000 1101 1001 (a) What binary value does location 2 contains? Location 5? (b) The binary value within each location can be interpreted in many ways. We have seen that binary values can represent unsigned numbers, 2's complement signed numbers, floating point numbers, and so forth. (1) Interpret location 0 and location 1 as2's Complement integers (2) Interpret location 4 as an ASCII value. (3) Interpret locations 6 and 7 as an IEEE floating Point number. Locations 6 contains number [15:0]Location 7 contains number [31:16]. (4) Interpret location 0 and location 1 as unsigned interges. (c) In the von Neumann model, the contents of a memory location can also be an instruction. If the binary pattern in location 0 were interpreted as an instruction, what instruction would it represent? (d) A binary value can also be interpreted as a memory address. Say the value stored in location 5 is a memory address. To which does it refer? What binary value does that location contain? 4.7 Suppose a 32-bit instruction takes the following format: OPCODE SR DR IMM If there are 80 opcodes and 32 registers, what is the range of values that can be represented by the immediate (IMM)? Assume IMM is a 2's complement value 4.8 Suppose a 32-bit instruction takes the following format: OPCODE DR SR1 SR2 If there are 225 opcodes and 60 registers, a) What is the minimum number of bits required to represent the OPCODE? b) What is the minimum number of bits required to represent the destination Register (DR)? c) What is the maximum number of UNUSED bits in the instruction encoding