$6.$ Consider a $2$ mm long, $1\mathrm{.}0$um$-$wide metal wire. The sheet resistance is $0\mathrm{.}05/$

and the capacitance is $0\mathrm{.}3$ fF$/$um$.(10$ point$)$

a$)$ Construct a $3-$segment $-$model for the wire.

b$)$ Estimate the delay when a $2-$input NAND gate with transistor widths chosen to

achieve effective rise and fall resistances equal to a unit inverter is deriving a $2$x

inverter with the $2$ mm wire. The gate capacitance is C$=1$fF$/$um$,$ the effective

resistance is R$=2\mathrm{.}0$ kOhm$*$um$,$ the device width W$=0\mathrm{.}4$um for nMOS transistor of

unit inverter