Question: A 1 2 8 KB L 1 cache has a 1 2 8 byte block size and is 2 - way set - associative. How

A 128 KB L1 cache has a 128 byte block size and is 2-way set-associative. How many sets does the cache have? How many bits are used for the offset, index, and tag, assuming that the CPU provides 32-bit addresses? How large is the tag array? Please show your equations and steps.

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