a$)(4$pts$)$ What is the clock cycle time in a pipelined and non$-$pipelned processor?

b$)(4$pts$)$ What is the total latency of an LW instruction in a pipelined and non$-$pipelined

processor?

c$)(7$pts$)$ Assume NO forwarding or other advanced technologies used in the pipelined

processor illustrated above, identify where stalling might happen in the program below.

add $s$0,$ $s$1,$ $s$2$

sub $s$0,$ $s$0,$ $s$3$

beq $s$1,$ $s$3,$ L

ori $t$1,$ $t$2,$ $t$3$

lw $t$2,12($$t$5)$

add $t$8,$ $t$2,$ $t$1$