Question: A DRAM must operate with a minimum refresh time of 4 m s . The storage capacitor in each cell has a capacitance of 5

A DRAM must operate with a minimum refresh time of 4ms. The storage capacitor in
each cell has a capacitance of 50fF and is fully charged at 5V. Estimate the worst-case
leakage current that the dynamic capacitor node can tolerate (i.e., the charge in the capac-
itor has dropped to its 50% level).
A DRAM must operate with a minimum refresh time of 4ms.

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