a. For each of these references, identify the binary address, the tag, and the index given a direct-mapped cache with 16 one-word blocks. Also list if each reference is a hit or miss, assuming the cache is initially empty.

b. For each of these references, identify the binary address, the tag, and the index given a direct-mapped cache with 8 two-word blocks. Also list if each reference is a hit or miss, assuming the cache is initially empty

c. For each of these references, identify the binary address, the tag, and the index given a two-way set-associative cache with 16 one-word blocks (Hint: there are 8 sets). Also list if each reference is a hit or miss, assuming the cache is initially empty. Use a LRU replacement strategy.

d. Calculate the total number of bits required for the cache listed in (c). Include tag storage, dirty bit storage, valid bit storage, and the data storage

1. Below is a list of 32-bit memory address references, given as hexadecimal byte addresses. The memory accesses are all reads and they occur in the order given 0x0, 0x124, 0x234, 0x88, 0x40, 0xC, 0x41C, 0x24, 0xFF8, 0x0, 0x4