A parity generator is commonly used in digital systems to generate an extra bit $($i$.$e$.,$ parity bit$)$ that forces the number of bits $($data $+$ parity bit$)$ to be either even or odd.

The circuit below is an even parity generator because the output $($F$)$ goes to a logic $1$ when an odd number of $1\text{'}$s is applied to the inputs. This output $($F$)$ can then be used directly as the parity bit.