Question: A three-input OR gate can be implemented by combining two two-input OR gates. Similarly, a three-input AND gate can be constructed from two two-input AND

A three-input OR gate can be implemented by combining two two-input OR gates. Similarly, a three-input AND gate can be constructed from two two-input AND gates. Can the same thing be done with NAND and NOR gates? In other words, can a three-input NAND gate be implemented using two two-input NAND gates? Can a three-input NOR gate be implemented using two two-input NOR gates? Use a truth table to prove your answers.

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