$($a$)$ Write a Verilog code for a simple Arithmetic and Logic Unit $($ALU$)$ that implements $8$

functions as described in Table $1.$ Table $1$ shows the encoding of the control input. $(**$ Read

the design restrictions carefully$)$

$($b$)$ Test your design $($all for operations$)$ by providing proper inputs and observing outputs on the

waveform window. You need to come up with inputs and expected outputs.

The $6-$bit ALU has the following inputs and outputs:

Inputs

A: $6-$bit input $[$a positive number; no sign bit$]$

B: $6-$bit input $[$a positive number; no sign bit$]$

Cin: $1-$bit input

Control: $3-$bit control input

Outputs

Output: $6-$bit output

Cout: $1-$bit output

Table $1$: ALU Instructions

The following things should be taken care of:

Use a case statement that checks the "Control" and acts on A$,$ B$,$ and Cin as described in

Table $1.(**$ case statement should be in 'always' block$)$

All the ALU operations are completely combinational.

Verilog coding should follow the given design guidelines described in Table $1.$