Assume a process uses 32-bit addresses to access cache. The cache is 4-way set associative and has a block size of 32 bytes. There are 2048 sets in the cache. Assume each block has 2 status bits (valid bit and dirty bit) and each set has 4 bits for pseudo LRU policy. b) How many bits are in the cache index? c) How many bits are in the tag? d) * What is the total number of bits in the cache, including status bits, tag, data, etc.? e) How many comparators are needed to compare tags