[10 points] A Microprocessor with 16-bit memory addresses, it has a 4K-byte cache organized in a 2-way set associative manner with 64 bytes per cache block. The cache uses LRU block replacement and of a write back type and no-write allocate. Assume that the size of each memory word is 1 byte. a. Calculate the number of bits in each of the Tag, Index, and Offset fields of the memory address and how large is the tag array? b. When a program is executed, the microprocessor accesses data sequentially from the following word addresses: Read 64, Read 127, Write 128, Read 159, Write 2176, Write 2192, Write 140, Read 128, Read 2176 Determine the Misses and hits and then calculate the Miss rate