Assume that main memory accesses take $25$ ns and that $\backslash (30\backslash \%\backslash )$ of all instructions access data memory. The following table shows data for L$1$ caches attached to each of two processors, P$1$ and P$2.$

a$)$ Assuming that the L$1$ hit time determines the cycle times for P$1$ and P$2,$ what are their respective clock rates $(4$ points$)?$

b$)$ What is the Average Memory Access Time for P$1$ and P$2($in cycles$)(8$ points$)?$