Assume that the instruction is executed in a single-cycle datapath. The Following instruction was fetched:

0000 0010 0001 0000 1000 0000 0010 0000

Assume the data memory is all zeros and that the processors registers have the following values at the beginning of the clock cycle in which the above instruction word is fetched:

r0	r1	r2	r3	r4	r5	r16	r8	r12	r31
0	1	4	2	-2	15	8	6	2	-4

What are the outputs of the sign-extend the shift-2 unit for this instruction word?

What are the values of the ALU control units inputs for this instruction?

For each Mux, show the values of its data output during the execution of this instruction and these register values

For the ALU and the two add units, what are their data input values?

What are the values of all inputs for the registers unit?