Question: Time CC 2 CC 3 CC 4 CC 5 CC6 CC7 CC8 CC 9 CC 10 (clock cycles) CC 1 IM Reg ALU DM Reg

 Time CC 2 CC 3 CC 4 CC 5 CC6 CC7CC8 CC 9 CC 10 (clock cycles) CC 1 IM Reg ALU

Time CC 2 CC 3 CC 4 CC 5 CC6 CC7 CC8 CC 9 CC 10 (clock cycles) CC 1 IM Reg ALU DM Reg IM Reg ALU DM Reg IM Reg IM Reg IM Reg ALU DM Reg IM Reg ALUDM Reg IM Reg 2. In this exercise we examine in detail how an instruction is executed in a single-cycle datapath (refer to the figure in problem 1). Problems in this exercise refer to a clock cycle in which the processor fetches the following instruction word: [15pts] 1010 1100 0110 0010 0000 0000 0001 0100 Assume that the data memory is all zeros and that the processor's registers have the following values at the beginning of the cycle in which the above instruction word is fetched: ro r1 r2 r3 r5 rt r12 r31 0 2 -4 10 6 8 -16 What operation does this instruction perform? What are the outputs of the sign-extend and the "Shift -left 2" unit (near the top of Figure 4.24) for this instruction word? Do either of these components produce "useful" data for this instruction? a. b. c. What are the values of the ALU control unit's inputs for this instruction? d. What is the output of the register file Mux (i.e., the Mux to the left of the register file) during the execution of this instruction? e. What are the inputs to the ALU? Time CC 2 CC 3 CC 4 CC 5 CC6 CC7 CC8 CC 9 CC 10 (clock cycles) CC 1 IM Reg ALU DM Reg IM Reg ALU DM Reg IM Reg IM Reg IM Reg ALU DM Reg IM Reg ALUDM Reg IM Reg 2. In this exercise we examine in detail how an instruction is executed in a single-cycle datapath (refer to the figure in problem 1). Problems in this exercise refer to a clock cycle in which the processor fetches the following instruction word: [15pts] 1010 1100 0110 0010 0000 0000 0001 0100 Assume that the data memory is all zeros and that the processor's registers have the following values at the beginning of the cycle in which the above instruction word is fetched: ro r1 r2 r3 r5 rt r12 r31 0 2 -4 10 6 8 -16 What operation does this instruction perform? What are the outputs of the sign-extend and the "Shift -left 2" unit (near the top of Figure 4.24) for this instruction word? Do either of these components produce "useful" data for this instruction? a. b. c. What are the values of the ALU control unit's inputs for this instruction? d. What is the output of the register file Mux (i.e., the Mux to the left of the register file) during the execution of this instruction? e. What are the inputs to the ALU

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