COMP 5030- Design Project 1 Due Date: 10/17/18 Fig. 1 shows a register file inside an &-bit CPU. It has 8 8-bit registers, that is, Data 1, Data 2 and Data 3 are all 8- bit width, and Address 1, Address 2 and Address 3 are all 3-bit width. Implement this register file by using the following off-the-shelf chips. (1) CY74FCT2574T: 8-bit Register (2) SN74HC151-Q1:8-to-1 Multiplexes (3) M74HC238: 3-to-8 Decoder (4) Other necessary gates that you need Register File Address Read Data Port 1 Port 2 endData 2 Address 2 Read Port 3 Write Data 3 Control Control Contro 1 port 2 pot 3 Read Read Write Choose add-ons Don't enable Several add-ons are ready for use Write Data 3 Address 3 Port 3 Would you like to store your passwond for trstate.edu? More inf COMP 5030- Design Project 1 Due Date: 10/17/18 Fig. 1 shows a register file inside an &-bit CPU. It has 8 8-bit registers, that is, Data 1, Data 2 and Data 3 are all 8- bit width, and Address 1, Address 2 and Address 3 are all 3-bit width. Implement this register file by using the following off-the-shelf chips. (1) CY74FCT2574T: 8-bit Register (2) SN74HC151-Q1:8-to-1 Multiplexes (3) M74HC238: 3-to-8 Decoder (4) Other necessary gates that you need Register File Address Read Data Port 1 Port 2 endData 2 Address 2 Read Port 3 Write Data 3 Control Control Contro 1 port 2 pot 3 Read Read Write Choose add-ons Don't enable Several add-ons are ready for use Write Data 3 Address 3 Port 3 Would you like to store your passwond for trstate.edu? More inf