Question: Consider a CMOS gate with the following logic expression: Y = A.B + C a) Sketch a transistor-level schematic. [4] b) Sketch a stick
Consider a CMOS gate with the following logic expression: Y = A.B + C a) Sketch a transistor-level schematic. [4] b) Sketch a stick diagram. [4] c) Estimate the width, height and area from the stick diagram, for a 32nm process. [2]
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