Consider a single cycle MIPS processor where its operation is divided into stages. Each stage is timed as shown below. What is the clock period of this processor.

Execution Time

Stage: Fetch Decode Execute Memory WriteBack

Time: $172$ ns $192$ ns $224$ ns $301$ns $63$ ns

Select one:

a$.301\mathrm{.}00$ ns

b$.952\mathrm{.}00$ ns

C$.190\mathrm{.}40$ ns

d$.63\mathrm{.}00$ ns

e$.$ None of the options