Question: Consider the attached MIPS single-cycle data-path. Assume that it is required to add to the instruction set architecture the following instruction: loopr1,r2,offset Let this instruction

Consider the attached MIPS single-cycle data-path. Assume that it is required to add to the instruction set architecture the following instruction: loopr1,r2,offset Let this instruction be of I-type with the format of This is a branch instruction that increments register r1 by 1, and compares it to r2. If these two values are not equal then the PC is set to PC+ offset
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