Consider the following instruction:

AND Rd$,$ Rs$,$ Rt

Interpretation: Reg$[$Rd$]=$ Reg$[$Rs$]$ AND Reg$[$Rt$]$

What are the values of the control signals generated by this control function?

RegDst $=1$

ALUOp $=0$b$0010$

Branch $=0$

MemWrite $=0$

MemRead $=0$

ALUSrc $=0$

MemtoReg $=0$

RegWrite $=1$

Which resources$/$blocks perform useful function for this instruction?

Which resources$/$blocks produce outputs, but their outputs are not used for this instruction? Which produce no outputs?

Problem $2$:

The basic single$-$cycle MIPS implementation in the provided figure can only implement some instructions. New instructions can be added to an existing instruction set architecture $($ISA$),$ but the decision whether or not to do that depends, among other things, on the const and complexity the proposed addition introduces into the processor datapath and control. For this problem, refer to the following proposed new instruction:

LWI Rt$,$Rd$($Rs$)$

Interpretation: Reg$[$Rt$]=$ Mem$[$Reg$[$Rd$]+$ Reg$[$Rs$]]$

Which existing blocks, if any, can be reused for this instruction?

Which new functional blocks $($if any$)$ are needed for this instruction?

What new signals do we need $($if any$)$ from the control unit to support this instruction?

When processor designers consider a possible improvement to the processor datapath, the decisions usually depends on the cost$/$performance trade$-$off. For this problem, assume that we are starting with the datapath shown in the provided figure, the different elements have latencies and costs as show in the provided table image

Consider adding a multiplier to the ALU. This addition will add $300$ps to the latency of the ALU and will add a cost of $600$ to the ALU. The result will be $5\%$ fewer instructions executed because we will no longer need to emulate MUL instructions.

What is the clock cycle time with and without this improvement?

What is the speedup achieved by adding this improvement?

Compare the cost$/$performance ratio with and without this improvement