Question: Consider the pipelined datapath with control shown below and taken from Chapter 6 of Patterson and Hennessy. Assume the control signals at EX, MEM, and

Consider the pipelined datapath with control shown below and taken from Chapter 6 of Patterson and Hennessy. Assume the control signals at EX, MEM, and WB stages have the following values, where the left-most bit corresponds to the upper-most bit in the figure:

EX: 100001100

MEM: 11010

WB: 00

Based on the values of the control signals, state what instructions are executing in each of these stages. If you can not identify an instruction exactly, narrow the instruction down to the smallest set of possibilities. Recall that the only instructions implemented by this datapath are lw, sw, add, sub, and, or, slt, beq.

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