Consider two different implementation of the same instruction set architecture. The instructions can be divided into four classes according to their CPI (class A, B, C, and D). P1 with a clock rate of 3.5 GHz and CPIs of 2, 1.5, 2.5, and 3 while P2 has a clock rate of 3.0 GHz and CPIs of 1.75, 1.5, 2, and 2.5. Given a program with a dynamic instruction count of 2.0 times 10^6 instructions divided into the classes as follows: 10% class A, 20% class B, 50% class C, and 20% class D, which processor is faster? (Question derived from question 1.6 in "Computer Organization and Design") What is the CPI of P1 based on this instruction mix? (answer should be in the format of X.XX) __________ What is the CPI of P2 based on this instruction mix? (answer should be in the format of X.XX) _____________ How many clock cycles are required for P1 to complete the 2.0 times 10^6 instructions? (Answer should be in format X.XX times 10^y) __________ How many clock cycles are required for P2 to complete the 2.0 times 10^6 instructions? (Answer should be in format X.XX times 10^y) __________ Which processor executes these 2.0 times 10^6 instructions faster? (answer should be P1 or P2) _________ What was the execution time in milli-seconds of the faster processors? (Answer format should be in mS to 2 decimal points such as 10.35 or 3.87) __________