Consider two different implementations of the same instruction set architecture. The instructions can be divided into four classes according to their CPI(class A, B, C and D). P1 with a clock rate of 2.5 GHz and CPIs of 1, 4, 2, and 2 P2 with a clock rate of 3 GHz and CPIs, of 2, 2, 2 and 2. Given a program with a dynamic instruction count of 1.0E6 instructions divided into classes an follows: 10% date A, 30% class B, 50% class C, and 10% class D, which is faster: P1 or P2? What is the average CPI for each implementation? Find the clock cycles required in both cases. If the CPI of all these 4 types instructions can be reduced by 20% by some new theory, and if the research resource is limited and the engineers can only focus on improving the execution of one type instruction