Question: Consider two instructions as below. ADDR1,R2,R3SUBA,R1 Fetch Instruction (FI), Decode Instruction (DI), Fetch Operands (FO), Execute Instruction (EI), and Write Operand (WO). Note that each

Consider two instructions as below. ADDR1,R2,R3SUBA,R1 Fetch Instruction (FI), Decode Instruction

Consider two instructions as below. ADDR1,R2,R3SUBA,R1 Fetch Instruction (FI), Decode Instruction (DI), Fetch Operands (FO), Execute Instruction (EI), and Write Operand (WO). Note that each stage requires one clock cycle. Answer the following questions. (i) Illustrate the scenario with a timing diagram. (ii) Discuss your answer in Q3(d)(i). (2 marks) (4 marks)

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