Correction to Part B: You are ALLOWED to use NOT gates if needed.

Part A: Design and wire a circuit to implement the Boolean expression S (x, y, z) = m (1, 2, 4, 7) using an 8-to-1 multiplexer (TTL Part 74LS151). Here, S stands for sum bit. Verify the operation by checking all input combinations in the Boolean function's truth table Part B: Implement the function S (x, y, z) from Part A using only a 4-to-1 multiplexer (TTL Part 74LS153). You are not allowed to use any other logic gate:s