Design a (4+1)-bit parity check register that has two inputs, E to enable the circuit, and a 4-bit input value. When E = 0 the circuit is disabled. When E=1 the 4-bit input is applied to bits 0 to 3 of the register. During this transition, the bit_4 of the 5-bit register is loaded with the parity value of the lower 4 bits. Thus, if the 4-bit value 0101 is loaded into the register, the bit_4 value must be loaded as a 0, indicated positive parity (even number of 1 bit values). If the 4-bit value 1011 is loaded into the register, the bit_4 value must be loaded as a 1 (odd number of 1 bit values).