Design a 4-bit circuit that can perform either BCD or binary addition under the control of a mode bit, M. When M = 0, the circuit outputs the sum using binary addition. When M = 1, the circuit outputs the sum using BCD addition Use the following entity entity binary_bcd is port (a, b : in std_logic_vector (3 downto 0); m, cin; in std logic; f: out std_logic_vector (3 downto 0); cout : out std logic); end entity binary_bcd; Perform the following steps a. Develop a behavioral architectural body for the system. b. Modify the test bench given in homework #1 to test this circuit for all possible input combinations. C. Compile all of the files d. Simulate to verify correctness. Turn in all VHDL files