Design a four$-$bit arithmetic logic unit $($ALU$)$ connected with an $8\backslash$times $8$ memory. The circuit has two four$-$bit input data paths $($A$0,...,$ A$3$ and B$0,...,$ B$3),$ two selection lines $($s$0$ and s$1),$ and a four$-$bit output data path $($y$0,...,$ y$4).$ The circuit performs the needed operation in four cycles. $$ At the first two cycles, the ALU reads the two four$-$bit data words from the memory $($depending on the address lines$)$ and loads them into the A and B data paths of the ALU unit. $$ At the third cycle, the ALU performs one of four operations $($depending on the selection lines s$0$ and s$1)$ on the A and B data paths. $$ At the fourth cycle, the ALU writes the output bits on a selected memory location. The table below shows the operations that the ALU can perform on the data.