design a synchronous sequential circuit for the following sequence using a 3-bits up down counter which contains a 1-bit clock input(clk), a 1-bit up/down selector(updown), 1-bit count enable(cnt_en), a 1-bit synchronized load control(slood), a 3-bits data input(data) and a 3-bits data output(q). Explain how your design operates in detail and draw the circuit diagram.

0, 7, 6, 5, 3, 1, 0, 7, 6, 5, 3, 1