Design the planning function for this system and show the details of the connection between Cache memory
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Design the planning function for this system and show the details of the connection between Cache memory and main memory.
• The cache used is divided into two memories, one for data and another for instructions.
•Both memories are sized .8Kbytes
• Transfer data(data bus I think) between Cache memory and the main memory block size has 16bytes.
• The size of the main memory. 16Mbytes and each byte is entitled on 24bit address..
• Cache Memory set 2-way associative using interrelated layout.
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