Question: digital logic desgin CS 230 Digital Logic Design Assignment 1: Lab Work 2 (Week 6) [Total: 2 marks] Objectives: 1. To be able to design

digital logic desgin digital logic desgin CS 230 Digital Logic Design Assignment 1: Lab Work

CS 230 Digital Logic Design Assignment 1: Lab Work 2 (Week 6) [Total: 2 marks] Objectives: 1. To be able to design logic circuit using Universal NAND and NOR gate. Questions: Given the timing diagram given below, answer the following questions: D (a) Derive the truth table (b) Give the Boolean expression for F. (c) Give the Boolean function for F. (d) Simplify using Boolean Algebra (e) Simplify using KMAP. (1) Draw the simplified expression using NAND gate only (g) Draw the simplified expression using NOR gate only. (h) In the atanua simulator design the NAND gate and NOR gate using logic gate circuit and chips

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