Digital logic design

Which one is true?

the statement that best describes the operation of D flip-flop if the clock is a negative edge-triggered is: a. The Q output is always the same as the D input at the positive edge of the clock. O b. The Q output is always the same as the D input O c. The logic level at the D input is transferred to Qoninegative edge of the clock O d. The Q output is always the same as the clock input if the D input equals 1