Discussion A combinational logic circuit is to be designed from the following truth table: ABCF Prelab (to be checked by the TA at the BEGINNING of your lab class) [10 points]1) Write F in canonical SOP form. [10 points] 2) Write F in canonical POS form. [10 points] 3) Minimize Fusing Boolean algebra to design the combinational logic circuit using the fewest number of IC chips. The person(s) using the minimal number of IC chips with the maximum number of unused gates will receive 5 points extra credit for this lab. Note the type and quantity of all SSI chips and gates used