Exercise $2$

$1-$ What would be the value in TPMO$\_$MOD of the KL$25$ microcontroller to yield the maximal sampling rate of its ADC converter using TOF of TPMO module for triggering the start of the ADC conversion. Assume that the ADCK clock is selected to be its Bus clock, the frequency of which is set to $24$ MHz

$2-$ Design the circuit conditioning of the ADC module if the analog signal ranges from $0\mathrm{.}5$ mV to $+0\mathrm{.}5$ mV $,$ vref $\backslash (+=3\mathrm{.}3\backslash$mathrm$\{$~V$\}\backslash )$ and $\backslash (\backslash$mathrm$\{$Vref$\}-=-3\mathrm{.}3\backslash$mathrm$\{$~V$\}\backslash ),$ and that the minimum quantization error is sought.

$3-$ Provide the proper values of the associated KL$25$ control registers corresponding to the above constraint assuming that:

a$.$ The analog signal is fed to channel $10$ of the KL$25$ ADC module

b$.$ The analog signal is a differential signal $($i$.$e$.$ not single ended$)$

c$.$ Vref$+(3\mathrm{.}3$ Volts$)$ and vref$-\backslash ((-3\mathrm{.}3\backslash$mathrm$\{$~V$\})\backslash )$ are used

d$.$ Number of bits sought in ADCO$\_$RO is signed $13$ bits