Exercise $8$a$\mathrm{.}4$: A $4-$bit count down ripple counter is designed using J$-$K flip$-$flop with positive edge triggered clock.

a$)$ Draw the connection of logic symbol.

b$)$ Draw the waveform outputs for $8$ clock cycles.

c$)$ Construct a state table for the counter.

d$)$ Draw the state diagram the the counter.