F1 (a, b, c, d) = m (3, 4, 6, 9, 11) + d (7, 12)

F2 (a, b, c, d) = m (2, 4, 8, 10, 11, 12) + d (6, 7, 9)

F3 (a, b, c, d) = m (3, 6, 7, 10, 11) + d (4, 9, 12)

F4 (a, b, c, d) = m (2, 6, 10, 11, 12) +d(4)

1) Design the switching functions using 4:1 MUXs (the 4:1 MUXs must be designed using the 2:1 MUXs*).

2)Design the switching functions using 8:1 MUXs (the 8:1 MUXs must be designed using the 4:1 MUXs*).

3) Design the switching using 3:8 DMUXs and minimal logic gates (the 3:8 DMUXs must be designed using the 2:4 DMUXs*).

*Create schematic symbols from the smaller components (2:1 MUX, 4:1 MUX and 2:4 DMUX) to make the design of the larger components easier.

Multiplexers

Multiplexers (MUXes) are used to select one input from several possible inputs. The symbol for a multiplexer is shown in Figure 1. In the 2:1 MUX shown below, if sel is 0, A will be output and if sel is 1, B will be output. It is usually helpful to make a note on the schematic symbol to tell users which input will be output for each state of the select line(s).

Figure 1 2:1 Multiplexer

DMUXs

De-multiplexers (DMUXs) translate one input with a set of select lines to a set of outputs, which is generally larger than or equal to the set of select lines, based on a pre-defined code. For example, a binary-to-decimal DMUX has one input and N select lines and 2N outputs. Given a binary select code (4 bits), it sets the output represented by that binary code to 1 (or 0) while keeping the other outputs at 0 (or 1).