Question: Figure in below shows a pipelined MIPS implementation. If all stages require 250 ns to complete its work, how much time will be taken to

Figure in below shows a pipelined MIPS implementation. If all stages require 250 ns to complete its work, how much time will be taken to execute the above program in a five stage pipelined MIPS processor?

ID/EX WB: EX/MEM WB Control M MEMWB IFAID EX M WB 0 M 1 Instruction Registers ALU 1 PC Instruction memory Ex Data memory IF/ID. RegisterRs IF/ID. RegisterRt IF/ID.RegisterRt IF/ID. RegisterRd Rs RI Rt Rd EX/MEM.RegisterRd *3 Forwarding MEMWB.RegisterRd unit Mux A Mux B A E B Forwarding unit F D

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