First table threshold voltage is $0\mathrm{.}43$ V and second table threshold voltage is $0\mathrm{.}404$V$.1.$ For $\backslash (130-\backslash$mathrm$\{$nm$\}\backslash )$ CMOS node, $2$ nm of SiON is used as the gate dielectric to prevent impurity atom diffusion $($SiON is denser$).$ The structure is shown in the figure below on the left. For $\backslash (45-\backslash$mathrm$\{$nm$\}\backslash )$ CMOS node, HfO is used as the gate dielectric. HfO has a high dielectric constant of $20.$ This is the so$-$called high$-$K gate. In addition to the HfO layer, a very thin layer of SiO $2$ was added to reduce the interface states. The structure is shown below on the right.

$($a$)$ Find the threshold voltage of these structures $($You did this already in homework $\backslash$#$10.$ If you did this correctly, you can directly use the results you have for part b$)($b$)$ Assume electron mobility of $\backslash (300\backslash$mathrm$\{$~cm$\}^\{2\}/\backslash$mathrm$\{$V$\}\backslash )-$sec$,$ electron saturation velocity of $8$E$6\backslash (\backslash$mathrm$\{$cm$\}/\backslash$mathrm$\{$sec$\}\backslash ),$ and gate length of $130$ nm $.$ Calculate the drain current and the transconductance at $\backslash (\backslash$mathrm$\{$Vgs$\}=1\mathrm{.}2\backslash$mathrm$\{$~V$\}\backslash )$ and $\backslash (\backslash$mathrm$\{$Vds$\}=1\mathrm{.}2\backslash$mathrm$\{$~V$\}\backslash )$ using the velocity saturation model.

$($c$)$ Compare the drain current and the transconductance you obtained for the two structures, and explain the difference.