Question: For a direct - mapped cache design with a 3 2 - bit address, the following bits of the address are used to access the

For a direct-mapped cache design with a 32-bit address, the following bits of the address are used to access the cache.
Tage Index Offset
31-109-54-0
1. What is the cache block size (you can answer it in either word or byte)?
2. How many entries does the cache have?

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