Question: Given this type of data: type type _ 1 Dx 1 D is array ( 1 to 3 ) of std _ logic _ vector

Given this type of data:
type type_1Dx1D is array (1 to 3) of std_logic_vector(3 downto 0); signal s: type_1Dx1D;
s=("0100","0110","1000");
What is s(1)(0)?
Given this type of data: type type_1Dx1D is array (1 to

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