Gve the values needed for all control lines in the datapath below. The table in the next page should be used. The column headers are the 32-bit machine code representation of the instructions. (Hand in just your completed table.) The first page of the RISC-V green card in the Documentation section of the course web) shows which format each instruction type is and also the instruction encoding of each type. The second page shows how to map from opcode and funct fields in the machine instruction to the assembler name for the instruction. (o - Add Sum Shift left 1 Branch Mem Read MemoRa Instruction [6-01 Control ALUOP Mem White ALUSTO RegWrite Instruction (19-15) Read address Read register 1 Read Instruction [24-20] Read data 1 Instruction [31-01 Instruction memory register 2 Write Zoro ALU ALU Instruction [11-7) Read - dressRead Address data result register data 2 OSX 23 Write data Registers Write Data data memory Instruction (31-0 Imm 64 Gen ALU control Instruction (30,14-12] [Figure 4.17 from book, Copyright 2018 Elsevier Inc. All rights reserved.] 17-519-103-527 lames C. Hoe CMW/ECE/CALCM Q2019 Control lines are 1 bit wide, except for ALUop. For ALUop, write an English word for the operation the ALU should perform. (For the others, write 0 or 1.) The Zero output of the ALU is 1 if the ALU's output is 0, and 0 otherwise. The symbols for muxes contain labels for their inputs. 00f777b3 04010113 fef42623 00f70a63 Example: 00f707b3 add Symbolic opcode Branch 0 MemRead MemtoReg 0 ALUOP add Mem Write 0 ALUSrc RegWrite Gve the values needed for all control lines in the datapath below. The table in the next page should be used. The column headers are the 32-bit machine code representation of the instructions. (Hand in just your completed table.) The first page of the RISC-V green card in the Documentation section of the course web) shows which format each instruction type is and also the instruction encoding of each type. The second page shows how to map from opcode and funct fields in the machine instruction to the assembler name for the instruction. (o - Add Sum Shift left 1 Branch Mem Read MemoRa Instruction [6-01 Control ALUOP Mem White ALUSTO RegWrite Instruction (19-15) Read address Read register 1 Read Instruction [24-20] Read data 1 Instruction [31-01 Instruction memory register 2 Write Zoro ALU ALU Instruction [11-7) Read - dressRead Address data result register data 2 OSX 23 Write data Registers Write Data data memory Instruction (31-0 Imm 64 Gen ALU control Instruction (30,14-12] [Figure 4.17 from book, Copyright 2018 Elsevier Inc. All rights reserved.] 17-519-103-527 lames C. Hoe CMW/ECE/CALCM Q2019 Control lines are 1 bit wide, except for ALUop. For ALUop, write an English word for the operation the ALU should perform. (For the others, write 0 or 1.) The Zero output of the ALU is 1 if the ALU's output is 0, and 0 otherwise. The symbols for muxes contain labels for their inputs. 00f777b3 04010113 fef42623 00f70a63 Example: 00f707b3 add Symbolic opcode Branch 0 MemRead MemtoReg 0 ALUOP add Mem Write 0 ALUSrc RegWrite