I just need help with the code and testbench I can do the simulations myself. Thanks.

3. Implement 4-bit Ripple Carry Adder circuit in VHDL (Structural model) and simulate using VCSMX and SimVision Use generic (VHDL) to declare vector size, and generate (VHDL) state- ment during component instantiation, so the code is compatible for N bit Ripple Carry Adder Circuit Description: The two input ports (A and B) and the output (S) are the 4-bit vector ports. The input port (CI) and the output port (Co) are single bit ports Use the Full Adder code of the previous lab for the Full Adder component. For better understanding, the block diagram of 4-bit Ripple carry adder is given in Figure 2 A) B3 A2 AI BI AD BO Co FA FA FA FA 53 53 s1 S0