In this homework, you will design three components using VHDL. For each problem, you need to add necessary comments in each source code and provide explanations on the waveforms. Your submission is not complete until we receive both your typed report in class and your source codes as an email attachment. Code Submission Guidelines: o Each problem in a homework is a Xilinx workspace folder o Name each workspace folder with a decent name (e.g, hwl_probl_xor) o Zip all workspace folders in one zip folder Name the zip file in the following format: ceng5534_hwnumber_yourlastname.zip ( e.g., ceng4534_hw1_koc.zip) Subject of the email should be: CENG5534 - HWnumber (eg, CENG5534 - HW1) o Email the zip file to TA Problem 1: (15 pts) In this problem, design a 16-bit 2-to-1 multiplexer using behavioral implementation style. Data inputs and output should be 16-bit vectors. In your test bench, you should include enough number of test cases to show the correctness of your design. Report: VHDL code and waveform Email : VHDL code