Increasing cache associativity (a) reduces compulsory misses (b) reduces miss penalty (c) reduces hit time (d) reduces conflict misses (e) all of the above (f) none of the above . The effectiveness of critical word first and early restart is greater when (a) cache block (line/row) sizes are small (b) miss penalties are small (c) the likelihood to access blocks near each other is small (d) all of the above (e) none of the above A measure for the throughput metric used to evaluate computer system performance is (a) CPI (b) MIPS (c) FLOPS (d) TPM (e) all of the above (f) none of the above . If the clock cycle time of a single-cycle unpipelined processor is C, and the clock cycle time of an n-stage pipeline is C, then the ideal speedup of the pipelined processor is approximately (a) n/C (b) (C)/C (c) C' (d) n (e) n-1 . In reality, pipelining cannot achieve an ideal speedup because of (a) data dependencies (b) hazards (c) faults (d) interrupts (e) all of the above (f) none of the above