Part $1$

$1)$ An ABCD$-$to$-$seven$-$segment decoder is a combinational circuit that converts a decimal digit in binary coded decimal $($BCD$)$ to an appropriate code for the selection of segments in an indicator used to display the decimal digit in a familiar form. The seven outputs of the decoder $(\backslash ($ a$,$ b$,$ c$,$ d$,$ e$,$ f$,$ g $\backslash ))$ select the corresponding segments in the display, as shown in Fig. $1($a$).$ The numeric display chosen to represent the decimal digit is shown in Fig. $1($b$).$ Using a truth table and Karnaugh maps, design the BCD$-$to$-$sevensegment decoder using a minimum number of gates.

$($a$)$ Segment designation

$($b$)$ Numerical designation for display

Figure $1.$

$2)$ Design a four$-$bit combinational circuit $2\text{'}$s complementor. $($The output generates the $2\text{'}$s complement of the input binary number.$)$ Show that the circuit can be constructed with exclusive$-$OR gates. Can you predict what the output functions are for a five$-$bit $2\text{'}$s complementor?